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WCET (Worst-Case Execution Time) static analysis solution

aiT

A binary-level static analysis solution that computes strict upper bounds for task WCET (Worst-Case Execution Time) in real-time systems, precisely accounting for cache and pipeline behavior by directly analyzing executable binaries.

#ISO26262 #WCET #DO178 #DO330 #IEC61508 #EN50128 #EN50657 #EN60601

In real-time systems, each task must complete within a specific time to ensure correct system operation. Therefore, knowing the WCET (Worst-Case Execution Time) of each task is essential, yet determining it is highly challenging.


aiT statically analyzes task-specific cache and pipeline behavior based on abstract interpretation techniques and cache/pipeline models, and calculates accurate and strict upper bounds for WCET.


The WCET upper bounds computed by aiT are strict enough to be guaranteed for all application inputs and executions under any circumstances.


• By directly analyzing the binary executable exactly as it runs on the final system, there is no need to modify system behavior, performance, or the toolchain.


• The calculated WCET upper bounds are sufficiently strict and reflect real system performance, ensuring deadline compliance without wasting hardware resources.

Key Features

1
Binary-Based WCET Static Analysis
Worst-Case Execution Time
Performs static WCET (Worst-Case Execution Time) analysis using only the final executable binary, enabling accurate and reliable computation of worst-case execution times without requiring source-level execution.
2
AI abstract interpretation-based solution
Automatically calculates WCET for all possible inputs and execution paths, and mathematically guarantees that the upper bound is not exceeded under the given hardware conditions.
3
Immediate Analysis Without Code Modification
No instrumentation or probe code is required for measurement, eliminating execution distortion and ensuring accurate WCET results without any changes to the original source code.
4
High-Fidelity Microarchitecture Modeling
Accurately reflects detailed processor behavior, including pipelines, caches, branch prediction, and other microarchitectural elements, to deliver precise and trustworthy WCET analysis results.
5
State inspection and machine-state tracing
Inspect cache states, pipeline states, and more at each point during analysis.
6
Support for Multiple Processors and Compilers
Provides broad support for a wide range of processors and toolchains, including AM486, ARM, C16x, C28x, C33x, ERC32, HCS12, and more.

Key Capabilities

1
Function Call Graph Visualization
• Each routine in the call graph is annotated based on its relative contribution to the overall WCET.

• Worst-case execution paths, infeasible calls, and recursion are automatically detected and highlighted.

• aïT automatically identifies locations that require additional annotations and provides guidance for correction.

• Each routine is linked to its Control Flow Graph (CFG), enabling deeper inspection of internal control flow.
2
Control Flow Graph (CFG) Analysis
• Displays execution time for cycles and basic blocks that contribute to the worst-case scenario.

• Allows easy access to detailed analysis information such as WCET contribution under various conditions.

• All locations requiring additional annotations are automatically marked, with optimal annotation suggestions provided for easy adjustment.

• Basic blocks can be expanded to inspect individual instructions, and all possible pipeline states for each instruction can be analyzed in detail.
3
Visualize pipeline and cache behavior
• Each horizontal layer corresponds to one CPU cycle, and each branch in the tree represents a different execution scenario

• Automatically explores all possibilities for cache hits and misses during memory access
4
Provide WCET statistics
• Collect various statistics to quickly identify bottlenecks and navigate areas of interest

• Export user-customizable XML reports for integration, documentation, or certification purposes
5
Provide a section view
• View all binary sections and inspect contents like a hex editor

• Inspect memory contents for specific address ranges
6
Extended Capabilities with Add-On Modules
• ValueAnalyzer
- Inspects the contents of all registers and memory cells at every program point across all execution contexts.
- Collects initialization data for global variables and provides automatically generated annotations for WCET analysis.

• TimingProfiler
- A derived product of aïT that performs static WCET analysis using simplified cache and pipeline models.
- Enables timing-aware development from early stages when the target processor has not yet been finalized.
- Once hardware is selected, users can seamlessly migrate to aïT without reinstallation, retaining all settings and annotations within the same GUI.
7
Provide Difference Analysis
• Compare analysis runs before and after system changes to quickly understand impacts on worst-case timing

Industries

Use Cases

1
Automotive
Support OEM-required WCET static analysis. Easily calculate worst-case execution time that cannot be detected through dynamic testing, using binary-based static analysis.
2
Aerospace & Defense
Calculate worst-case execution time required by DO-178B/C via static analysis to support safety certification for aircraft software.
3
Government/Public Sector
aiT is evaluated as the most accurate WCET analysis tool in the WCET Tool Challenge (WCC) in nearly every year and is widely used in computer science curricula and research at leading universities in Germany.

Key Clients

Automotive & Railways
  • 현대 logo image
  • Continental logo image
  • HONDA logo image
  • DAIMLER logo image
Aerospace & Defense
  • NASA logo image
  • AIRBUS logo image
Energy
  • MTU logo image
  • Framatome logo image
  • Vestas logo image

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